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Design of a Java Simulator for Fast Prototyping of System-on-chip

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Počet strán
88 stránok
Čas čítania
4 hodiny

Viac o knihe

Focusing on the development of a new simulator, the book introduces a Java-based library for creating transaction-level models, offering an alternative to SystemC for systems-on-chip prototyping. It identifies constraints in simulating transactional models and leverages Java's threading capabilities to enhance modeling efficiency. The simulator, named JTLM, is evaluated through a case study, showcasing its effectiveness in modeling behaviors without SystemC. Additionally, it proposes solutions to challenges faced in SystemC, highlighting the advantages of the JTLM execution model.

Nákup knihy

Design of a Java Simulator for Fast Prototyping of System-on-chip, Nabila Abdessaied

Jazyk
Rok vydania
2015
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